Irrelevant visual data is everything in a camera frame that does nothing for the task at hand: the sky above a licence plate, the wall behind a face, the empty road around a car. Most AI vision hardware processes it anyway, and every one of those pixels costs energy. Researchers at the College of Design and Engineering at the National University of Singapore (NUS CDE) have built a transistor that can discard those pixels in hardware, before the neural network ever sees them.
Their paper, published in Nature Electronics on 14 September 2026 and led by Professor Ang Kah-Wee, describes a single device that can act as a logic switch, an artificial neuron or an artificial synapse. In simulations based on measured device behaviour, cropping handwritten digits to the useful region needed about 36% fewer active hardware blocks and cost only 0.3 percentage points of accuracy. In a traffic scene, keeping only the vehicle cut estimated energy by about 59%. Keeping only the licence plate cut it by about 77%.
This article explains why irrelevant visual data is such a drain on edge devices, and how the NUS transistor filters it out. It also sets out what the full paper measured and what the press coverage leaves out, including the fact that the headline energy figures come from simulations of the computing arrays alone. The paper is open access, so every figure here can be checked against the original.
Table of contents
- Why Irrelevant Visual Data Wastes Energy in AI Hardware
- How the NUS Design Filters Irrelevant Visual Data
- The Transistor That Sorts Irrelevant Visual Data
- What the Tests Showed About Irrelevant Visual Data
- How Much Energy Filtering Irrelevant Visual Data Could Save
- What the Press Release Leaves Out About Irrelevant Visual Data
- Irrelevant Visual Data and Other Low-Power Vision Approaches
- Where This AI Hardware Design Could Go Next
- Frequently Asked Questions About Irrelevant Visual Data
- References
Why Irrelevant Visual Data Wastes Energy in AI Hardware
The problem the NUS team set out to solve is simple to state. Cameras capture far more than any single task needs, and the hardware that analyses the image usually cannot tell the difference until it has already done the work.
Cameras capture more than any single task needs
“When we read a car’s license plate, we tend to focus on the numbers and letters, paying little attention to the surrounding buildings or sky,” the NUS release explains. An AI system “may still process those surrounding details, consuming energy even when they contribute little to the task.” As cameras capture ever more detailed images, the release adds, this unnecessary processing wastes more energy, and the amount of irrelevant visual data in each frame grows with it.
Brain-inspired chips still spike on the background
The NUS design uses a spiking neural network, a type of AI modelled on how nerve cells communicate. Its artificial neurons gather incoming signals and fire brief pulses, or spikes, once enough input has built up. This event-driven style is already efficient, because idle neurons use little power. But as the paper puts it, neuromorphic systems “typically process all input features indiscriminately, leading to excessive neuronal activation and high energy consumption.” Background pixels still trigger spikes, and spikes cost energy.
Filtering in software arrives too late
The obvious fix is to crop the image in software first. The paper argues that existing approaches, such as reducing the dimensions of the data, filtering or sparse network architectures, “typically require the entire input to be processed initially.” The irrelevant visual data is still read, moved and handled before it is thrown away. The NUS idea is to stop it at the front door, in the same hardware that runs the network.
Edge devices feel it most
The waste matters most where power is scarce. The release names battery-powered security cameras, drones and other edge devices, which must analyse large amounts of sensor data quickly on a small power budget. For a data centre, wasted computation is a cost. For a drone, it is flight time.
How the NUS Design Filters Irrelevant Visual Data
The team calls its design a “spiking neural network-in-logic” architecture. The name describes the order of operations: rule-based logic runs first, and the neural network runs only on what the logic lets through.
Logic before the network
Control signals tell the logic circuits which parts of the image to keep. The circuits pass those pixels and block the rest, and only the selected data is converted into spikes for the network. In the paper’s words, the logic assigns “a ‘1’ to the focus area and a ‘0’ to the peripheral regions,” cropping non-essential parts of the image before any spiking computation happens. Irrelevant visual data never reaches the synapses and neurons.
Selective attention in silicon
“The idea is analogous to selective attention: first identify the information relevant to the task, discard what is unnecessary, and only then engage the neural network,” Ang said. The analogy is to human vision, which fixes on the task-relevant part of a scene and largely ignores the rest.
Two ways to decide what is relevant
The filtering layer is built from inverter, AND and OR gates, all made from the same transistor. AND logic performs what the paper calls coincidence-based pruning: a pixel passes only when two conditions are both met. OR logic performs salience-based pruning: a pixel passes if either condition is met. Crucially, a pixel that passes keeps its full grey level, so the network receives the original image detail rather than a black-and-white mask. In tests, the gate preserved 64 greyscale levels.
Tiles that change jobs
The transistors are grouped into tiles, each a 16 × 16 array. Any tile can be assigned to filtering, to synapses or to neurons, and reassigned for the next task. When filtering removes more irrelevant visual data, fewer tiles are needed for the network, so the hardware effectively shrinks the network to fit the task.
The Transistor That Sorts Irrelevant Visual Data
Letting a tile switch roles depends on one unusual device. Filtering needs clean, reliable switching, while a neural network needs some signals to fade and others to persist. These behaviours normally come from different device structures. The NUS team designed the materials and the control signals together so a single transistor provides all three.
| Role | How it is driven | What it does | Measured behaviour |
|---|---|---|---|
| Logic filter | Steady voltages on both gates | Passes or blocks a pixel’s value | On/off ratio of 109; switching slope 63.8 mV per decade; supply as low as 0.1 V |
| Neuron | Brief pulses on the ferroelectric gate | Builds up, fires, leaks away and resets | Fires at 25 µA; resets within 2 ms; firing window of 23 to 26 µA across ten devices |
| Synapse | Longer pulses on the ferroelectric gate | Traps charge to store a connection weight | 64 conductance levels; on/off above 1,000 after 10,000 s; weight-update variation of 2.39% and 2.24% |
An atom-thin channel
Current flows through a single layer of molybdenum disulfide (MoS₂), a two-dimensional semiconductor about 6.5 ångströms thick. Its thinness lets two control electrodes, called gates, regulate the current precisely. The paper reports a best-case switching slope of 63.8 mV per decade, close to the 60 mV room-temperature limit for conventional transistors, with leakage below 10−13 amps. Across 50 devices the average was 82.3 mV per decade.
A ferroelectric gate that remembers
One gate includes a 9-nanometre layer of hafnium zirconium oxide, a ferroelectric material whose internal charge alignment can be switched by voltage. A 2-nanometre layer of aluminium oxide sits between it and the channel and helps hold trapped charge in place. This stack is what lets the device give either a temporary or a lasting response to a signal.
Pulse length decides the role
The team selects the behaviour by changing how long each voltage pulse lasts. Brief pulses build up a response that then fades away, which mimics a neuron. Longer pulses trap electrical charge, leaving a lasting change in how easily current flows, which stores a synaptic weight. Under steady voltages, the same device performs logic to filter irrelevant visual data.
Built with standard processes
“We fabricated the transistors using processes compatible with mainstream chip manufacturing,” said co-author Professor Lance Li of the NUS Department of Materials Science and Engineering. The paper describes every step as compatible with the back end of line, the later stage of chip manufacturing where temperatures must stay low. The ferroelectric anneal runs at 400 °C.
What the Tests Showed About Irrelevant Visual Data
The paper tests the device in stages: first as a digit classifier, then on harder images, and finally in a simulated traffic scene where filtering irrelevant visual data matters most.
Handwritten digits
The team trained a small spiking network on the MNIST handwritten-digit benchmark using neuron and synapse parameters measured from its devices. The full 28 × 28-pixel images reached 95.9% accuracy. Cropping to 24 × 24 cut the number of active tiles by about 15%, including the extra tiles needed for filtering. Cropping to 20 × 20 cut them by about 36% and removed 48% of the stored weights, at a cost of roughly 0.3 percentage points of accuracy.
| Input region | Pixels kept | Active tiles | Accuracy |
|---|---|---|---|
| 28 × 28 (full image) | 784 | Baseline | 95.9% |
| 24 × 24 | 576 | About 15% fewer | Not separately reported |
| 20 × 20 | 400 | About 36% fewer; 48% fewer weights | About 95.6% (−0.3 points) |
| 16 × 16 | 256 | Fewer still | 94.4% |
The 48% figure can be checked by hand. The network has 784 inputs, 128 hidden neurons and 10 outputs, so the full image needs 784 × 128 + 128 × 10 = 101,632 weights. A 20 × 20 crop needs 400 × 128 + 1,280 = 52,480, which is 48.4% fewer.
Knowing when to stop cropping
At 16 × 16, the crop began cutting into the digits themselves, and accuracy fell to 94.4%. “The useful amount of filtering, therefore, depends on which visual features a task needs,” the release notes. Irrelevant visual data is task-specific: the same pixels can be noise for one question and essential for another.
Noise and harder images
The network held up under noise, scoring 95.7%, 94.9% and 93.6% with 10%, 20% and 30% noise added. On Street View House Numbers, a harder colour dataset of more than 600,000 images, a small network managed only 70%. A five-layer version reached 89%, but the paper notes that the gain “was accompanied by a notable increase in energy consumption.” On a gesture dataset from an event camera it reached 89.9%. These results show why shrinking the network by removing irrelevant visual data is attractive: harder tasks otherwise demand much bigger networks.
How Much Energy Filtering Irrelevant Visual Data Could Save
The most striking numbers come from a simulated traffic intersection, where one camera frame serves two tasks: recognising a vehicle and reading its licence plate.
Two tasks, one frame
Recognising a vehicle needs a wide view of its shape. Reading a plate needs a small region in fine detail. A conventional spiking network processes the whole frame for both. The NUS architecture selects a different region for each task, so each uses only the tiles it needs.
Where the savings come from
The tile counts explain the energy curve. Without filtering, the simulation needed 880,579 tiles working as synapses. Keeping only the vehicle cut that to 269,771, and keeping only the plate cut it to 94,096. Because synapse operations dominate the energy budget, removing irrelevant visual data from the input removes most of the cost.
Filtering is almost free
The paper’s energy model shows why this works. It assigns a fixed cost to each tile in each role. A synapse tile costs 2 × 10−5 joules, a neuron tile 7.9 × 10−9 joules and a logic tile 3 × 10−11 joules. On those figures a synapse tile costs about 2,500 times as much as a neuron tile and about 670,000 times as much as a logic tile. Spending a few logic tiles to block irrelevant visual data is a very cheap way to avoid expensive synapse work.
| Tile role | Energy per tile | Synapse tile costs this many times more |
|---|---|---|
| Synapse (worst case) | 2 × 10−5 J | 1 |
| Neuron (20 input pulses) | 7.9 × 10−9 J | About 2,500 |
| Logic (inverter at 1.5 V) | 3 × 10−11 J | About 670,000 |
Bigger images, bigger savings
The simulations also scaled the scene up to 216,216-pixel colour images. Conventional spiking networks needed sharply more energy, because they must process the full frame, while the filtered design grew much more slowly. That trend matters because real cameras are far larger than the test scene. A single 1080p frame has 2,073,600 pixels, 675 times the 3,072-pixel scene, so the finding that the advantage grows with resolution is the one that matters most for real deployments.
What the Press Release Leaves Out About Irrelevant Visual Data
The coverage of this paper has been accurate but short. Reading the full text adds five qualifications that anyone judging the work should know.
The energy figures are simulations
The device arrays were fabricated and measured, but the system-level results come from “device-calibrated simulations.” The team built an energy model from measured per-tile costs and multiplied them by the number of tiles each task would need. The release does say this, noting that the “estimates cover the computing arrays and exclude supporting circuits,” but that line is easy to miss beside the 77% headline.
Read the joules as relative, not absolute
The synapse cost is set “under a conservative worst-case condition,” with every active device in its highest-current state. That is why a small image appears to cost a fraction of a joule per inference. The paper says the method enables “a consistent comparison of relative energy scaling across tasks and input complexities.” The percentages are the finding; the absolute joules are an accounting unit.
Someone still has to say what is relevant
In the paper, “task-specific binary signals” tell the gates which pixels to pass. The main text does not describe how a deployed camera would decide, frame by frame, where the vehicle or plate is. In a moving scene that decision needs its own detection step, and its energy cost is not counted here. The architecture filters irrelevant visual data efficiently once the region is known.
The fabrication details differ slightly
In the release, Li describes the MoS₂ layer as grown by metal-organic chemical vapour deposition “in our lab” with “excellent uniformity across the wafer.” The paper’s methods section describes conventional chemical vapour deposition from sulfur and molybdenum trioxide powders on sapphire, producing an inch-scale single-crystal film. Its uniformity data come from a Raman scan across 7.5 millimetres and statistics from 50 transistors. Both accounts support good material quality; the paper’s is the more specific.
Accuracy is modest by today’s standards
A 95.9% score on MNIST shows the devices work, but conventional deep networks routinely exceed 99% on the same benchmark. The paper’s aim is energy scaling, not record accuracy, and its networks are deliberately small. The data and code are available from the authors on request rather than in a public repository.
Irrelevant Visual Data and Other Low-Power Vision Approaches
The NUS design is one of several ways to stop vision hardware wasting energy. It helps to see where it sits among them, including approaches we have covered before, such as neuromorphic chips versus GPUs and physical AI, where the hardware itself becomes the network.
| Approach | What it skips | Where it happens | Main trade-off |
|---|---|---|---|
| Software cropping | Pixels outside a chosen box | After the full frame reaches memory | The whole frame is still read and moved |
| Event cameras | Pixels that do not change | In the sensor | Needs a special sensor; change, not relevance, decides |
| Conventional neuromorphic chips | Work for neurons that do not spike | Inside the network | All input features still enter the network |
| NUS network-in-logic | Pixels outside a task region | In logic, before spikes, on the same tiles | The region must be supplied; system results are simulated |
Complementary, not competing
These approaches can stack. An event camera removes pixels that have not changed, and task-directed filtering could then remove moving pixels that are irrelevant to the question being asked. A computer vision system on a drone might use both. The paper’s own gesture results used event-camera data, which hints at that combination.
Why the reconfigurable part matters
Fixed hardware filters would need to be designed for one task. The NUS tiles can be reassigned between filtering and computing as the task changes, so the same chip can crop tightly to read a plate and then widen its view to recognise a vehicle. That flexibility is what turns filtering irrelevant visual data from a design choice into a runtime decision.
Where This AI Hardware Design Could Go Next
The paper is a device and architecture study, not a product. The team has set out what comes next.
Chiplets with optical links
Ang’s group plans to develop AI accelerator chiplets, small chips that work together to speed up AI computation. These would combine energy-managing computing architectures with new memory technologies and high-speed connections that move data using light. Testing them on realistic workloads would show real energy efficiency, speed and data movement across a whole system.
Drones, cameras and cars
The release names autonomous vehicles, drones and smart cameras as likely beneficiaries. All three must analyse large amounts of sensor data quickly on limited power, and all three spend much of each frame on irrelevant visual data. “Ultimately, our goal is to increase computing performance without a corresponding increase in power consumption,” Ang said, describing edge AI as a place “where every computation, and every joule, matters.”
What businesses should take from it
No product based on this work is available, and no timeline has been given. For businesses buying cameras, drones or edge AI devices today, the lesson is about where to look for efficiency. A device’s power draw depends as much on how much of each frame it processes as on the chip itself. Asking vendors whether their systems crop to regions of interest, and where in the pipeline that happens, is a useful question now.
Frequently Asked Questions About Irrelevant Visual Data
What is irrelevant visual data?
It is the part of an image that does not help with the task an AI system is performing, such as the sky and buildings around a licence plate. Processing it still uses energy, which matters most on battery-powered devices.
How does the NUS hardware filter it out?
Logic circuits built from the team’s reconfigurable transistors pass only the pixels in a selected region and block the rest before they are converted into spikes. The same transistors also serve as the network’s neurons and synapses, so tiles can switch between filtering and computing.
How much energy does it save?
In simulations of a 3,072-pixel traffic scene, keeping only the vehicle region cut estimated energy by about 59% and keeping only the licence plate cut it by about 77%. These figures cover the computing arrays only and exclude supporting circuits.
Is this chip available to buy?
No. The paper demonstrates fabricated devices and simulates the full system. The team’s next step is AI accelerator chiplets tested on realistic workloads.
What is a spiking neural network?
It is a type of AI modelled on how biological neurons communicate. Artificial neurons accumulate input and fire brief spikes when a threshold is reached, so energy is spent mainly when something happens.
References
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