Universal charge injector is the phrase a KAIST-led team has attached to a single material that solves two opposite problems at once, and it is the reason a semiconductor paper is being read as an AI chip story. The material is tin diselenide. The problem it addresses is old, specific and, until now, handled with two separate answers: how do you get current into an atomically thin semiconductor without wrecking it?
The work was published in Advanced Materials on 12 August 2026 under the title “A Universal van der Waals Tunneling Injector for Monolayer CMOS”, and KAIST announced it on 16 September 2026. Eighteen authors across seven organisations contributed, including three from Samsung Electronics’ semiconductor R&D centre — a detail worth noting before reading any of the results, because it tells you who thinks this problem is worth their time.
The headline numbers from the universal charge injector are a drive current more than a thousand times higher in one device type and an on/off current ratio above a billion in the other, both from the same contact material. Readers tracking the compute side of artificial intelligence will recognise why that combination matters more than either figure on its own.
This article explains what a universal charge injector actually is, why two-dimensional semiconductors have been stuck on this exact problem, what the reported figures mean once converted into engineering terms, and — the part press coverage tends to skip — the distance between a working laboratory inverter and a manufacturable chip. That distance is the whole story for anyone deciding what to believe.
Table of contents
- What a Universal Charge Injector Is, in Plain Terms
- The Physics That Makes a Universal Charge Injector Possible
- What the Universal Charge Injector Numbers Actually Say
- Why This Universal Charge Injector Points Toward Stacked AI Chips
- How the Universal Charge Injector Compares With Earlier Contact Schemes
- Who Did the Work, and Why the Author List Matters
- What Still Stands Between This and a Real Chip
- Frequently Asked Questions About the Universal Charge Injector
- References
What a Universal Charge Injector Is, in Plain Terms
Start with the word that is doing the work. In a universal charge injector, “universal” means one material serves both halves of a logic circuit, and that is a narrower and more useful claim than it first sounds.
Silicon logic needs two kinds of transistor
Every modern logic chip is built on complementary metal-oxide-semiconductor design, which pairs two transistor types. One conducts by moving electrons and is called n-type; the other conducts by moving holes, the absence of electrons, and is called p-type. Pairing them is what makes CMOS efficient, and it is the pairing a universal charge injector has to satisfy: in a steady state one of the pair is always off, so the circuit draws almost no current while it is simply holding a value.
Thin semiconductors break the contact, not the channel
Two-dimensional semiconductors such as molybdenum disulfide and tungsten diselenide are a single molecular layer thick. As channel material they are extraordinary. The difficulty has always been the contact: evaporating a metal electrode directly onto a sheet one atom thick damages its structure during fabrication, and the resulting junction throws up an energy barrier that carriers must climb thermally. That barrier is polarity-dependent, which is why, before the universal charge injector, the field ended up with one favoured metal for n-type devices and a different one for p-type.
One material, two mechanisms
A universal charge injector removes that fork in the road. The tin diselenide layer is laid against the channel rather than bonded to it, held by weak van der Waals attraction, so the fabrication damage largely disappears. More interestingly, the same material injects into both polarities by adapting the mechanism rather than the chemistry — band-to-band tunnelling for the p-type device, a field-reshaped barrier for the n-type one. One shelf item, two behaviours.
| Property | Conventional metal contact | Universal charge injector (SnSe2) |
|---|---|---|
| Bonding to the channel | Strong chemical bonds | Weak van der Waals contact |
| Fabrication damage | Significant on a monolayer | Largely suppressed |
| Injection mechanism | Thermionic emission over a barrier | All-tunnelling, polarity-tailored |
| Materials needed for CMOS | Two, one per polarity | One, for both |
| Interface gap states | Introduced by deposition | Effectively suppressed |
The Physics That Makes a Universal Charge Injector Possible
Three material properties carry the universal charge injector result, and each is reported explicitly in the paper.
A large electron affinity
Tin diselenide has an electron affinity of about 5.1 electronvolts. That is unusually deep, and it is what allows the universal charge injector to sit in a favourable energy relationship with two very different channel materials. Against p-type tungsten diselenide it produces what the paper calls a type-III, or broken-gap, alignment — the bands overlap in a way that lets carriers tunnel directly from one to the other.
Degenerate doping
The universal charge injector carries a free-carrier density above 10^19 per cubic centimetre, which puts it in the degenerate regime where the material behaves electrically much more like a metal than a semiconductor. That matters because a universal charge injector needs an abundant supply of carriers on its own side of the junction; a lightly doped contact becomes the bottleneck no matter how good the interface is.
An atomically uniform interface
The third property is the one hardest to quantify and easiest to underrate. Because the contact is made by van der Waals coupling rather than deposition, the interface is atomically uniform and largely free of the gap states that a damaged interface generates. Those states pin the energy alignment in place and defeat any attempt to tune it, which is a large part of why metal contacts to 2D materials have behaved so stubbornly for a decade.
Two mechanisms from one material
The elegance is in how the behaviour splits. In the p-type device the broken-gap alignment drives band-to-band tunnelling. In the n-type device the universal charge injector instead forms a type-I heterojunction inside a body thinner than its own depletion width, and the injection evolves with gate voltage — from Fowler-Nordheim-like tunnelling, where the field reshapes the barrier, to thickness-limited tunnelling. Same material, different regime, selected by the device rather than by the process engineer.
What the Universal Charge Injector Numbers Actually Say
Four figures are reported for the universal charge injector. Converted into what an engineer would care about, they say quite different things.
| Figure | Reported value | Device | What it governs |
|---|---|---|---|
| Drive current gain | More than 1,000x vs metal | p-type WSe2 | Switching speed |
| On/off current ratio | Above 10^9 | n-type MoS2 | Standby leakage |
| Subthreshold swing | Below 70 mV/decade | n-type MoS2 | Supply voltage floor |
| Inverter voltage gain | About 340 at 2 V | Monolayer CMOS inverter | Signal restoration |
The thousand-fold figure is about the contact, not the channel
A drive current more than a thousand times higher than a nickel electrode delivers sounds like a new transistor. It is not — the channel is the same tungsten diselenide it always was, and the universal charge injector changed only what reaches it. What changed is how much current can get into it. That is the correct way to read the number, and it also explains why the improvement is so large: the baseline was a thermionic barrier that most carriers simply could not climb.
The subthreshold swing is the quiet headline
Subthreshold swing measures how many millivolts of gate voltage are needed to change the current by a factor of ten. At room temperature, conventional thermionic transistors face a hard floor of about 60 mV per decade set by the Boltzmann distribution. The reported figure for the universal charge injector is below 70, which is roughly 17% above that floor — not below it, but close enough to be a genuinely steep switch, and steepness is what lets a chip run at a lower supply voltage without losing its ability to turn off.
Those bars are the exponents of the paper’s own figures, scaled against the largest. They compare nothing across vendors and predict nothing — they exist to show that the four headline claims are not the same size, and that the one reported as “more than a thousand times” is the smallest of them in exponent terms.
Voltage gain of 340 is the circuit-level proof
The single most important universal charge injector result is not any transistor measurement. It is that the team built a working monolayer CMOS inverter — the fundamental logic building block — and measured a maximum voltage gain of about 340 at a two-volt supply. High gain means the inverter restores a degraded input to a clean output, which is the property that lets you chain thousands of gates without the signal dissolving. A contact scheme that produces good transistors but poor inverters is an interesting result; one that produces a high-gain inverter is a candidate technology.
Why This Universal Charge Injector Points Toward Stacked AI Chips
The link from the universal charge injector to AI hardware runs through one idea: vertical integration.
Density is now a packaging problem
Accelerators for large models are limited less by transistor speed than by how much compute and memory can be placed close together. Shrinking features laterally has become brutally expensive, so the industry has been moving upward — stacking memory, stacking dies, stacking layers of logic. The workloads driving this are the transformer-based systems behind natural language processing and image models, and their appetite for local bandwidth is what sets the agenda. Every generation of machine learning hardware has moved the bottleneck somewhere new, and right now it sits between the compute and the data it needs.
Monolayer devices are the natural stacking candidate
A transistor one molecular layer thick, fabricated at low temperature, is far easier to build in vertical tiers than a silicon device that needs a high-temperature process on a crystalline substrate. That is the specific promise a universal charge injector serves: not a faster transistor, but a transistor you can build several layers of without destroying the layers underneath.
One injector halves the process complexity
Here is where a universal charge injector earns its place in that story. Every extra material in a stack means extra deposition steps, extra masks, extra thermal budget and extra opportunities for one layer to contaminate another. Needing one universal charge injector instead of two contact metals for a complete CMOS layer is a real reduction in process complexity, and complexity is what makes stacked fabrication uneconomic long before it makes it impossible.
| Route to more compute per unit area | Main constraint | Where this work applies |
|---|---|---|
| Smaller silicon features | Lithography cost and leakage | Not at all |
| Stacked dies and advanced packaging | Thermal budget, interconnect | Indirectly |
| Monolithic 3D logic layers | Low-temperature device fabrication | Directly |
| Compute-in-memory architectures | Device variability | Indirectly |
How the Universal Charge Injector Compares With Earlier Contact Schemes
Contacting a monolayer semiconductor is one of the most worked-over problems in device research, and several partial answers already exist. Placing this one against them is the fastest way to see what is genuinely new.
Transferred metal contacts
One established route keeps conventional metals but stops evaporating them onto the channel. The metal film is fabricated separately and laid down afterwards, which avoids the deposition damage. It works, and it produces clean interfaces, but it leaves the polarity problem exactly where it was: you still choose a low-work-function metal for n-type devices and a high-work-function one for p-type. A universal charge injector answers the second problem as well as the first.
Semimetal and phase-engineered contacts
A second family engineers the contact material itself — using a semimetal whose band structure suppresses the interface states that pin the energy alignment, or converting a region of the channel into a metallic phase so the junction becomes seamless. Both have produced excellent single-polarity devices. Both are also polarity-specific, and phase engineering adds a process step that has to be controlled at the same atomic scale as everything else.
Two-dimensional metallic contacts
The closest relatives to this work are contacts made from other layered materials, graphene most often. These share the van der Waals advantage: no bonding, no damage, an atomically defined interface. What they have generally lacked is the energy alignment to serve both polarities well, which is precisely the gap the tin diselenide result addresses through its deep electron affinity and degenerate doping.
| Approach | Avoids deposition damage | Serves both polarities | Extra process steps |
|---|---|---|---|
| Evaporated metal | No | No | Fewest |
| Transferred metal | Yes | No | Transfer step |
| Semimetal or phase-engineered | Partly | No | Conversion step |
| Universal charge injector | Yes | Yes | Growth or transfer of one layer |
What is new, stated conservatively
The honest summary is that the universal charge injector is not the first damage-free contact, nor the first tunnelling contact, nor the first high-performance monolayer transistor. It is the first reported contact material that does all of it for both polarities at once and then demonstrates the result at circuit level. That combination is the contribution, and it is worth more than any individual figure in the paper.
Who Did the Work, and Why the Author List Matters
An eighteen-author paper spread across seven organisations tells you something about the universal charge injector that no single number can.
The composition of the team
Hanbin Cho, a KAIST doctoral candidate, is first author. Professor Joonki Suh of KAIST and Professor Kyungmin Ko of Yonsei University’s Division of AI Semiconductor are co-corresponding authors. The remaining contributors come from the Korea Institute of Science and Technology, Hanyang University, UNIST, the Beijing Computational Science Research Center and Samsung Electronics.
Samsung’s presence is the signal to read
Three of the eighteen authors sit in Samsung Electronics’ semiconductor R&D centre, and KAIST names Samsung as the primary funder alongside Korea’s National Research Foundation, Ministry of Science and ICT, and Ministry of Education. A foundry putting named staff on a universal charge injector paper is not proof of a roadmap slot. It is evidence that the problem is considered live inside a company that would have to manufacture the answer, which is a meaningfully stronger signal than academic interest alone.
What Still Stands Between This and a Real Chip
Every honest reading of the universal charge injector needs this section, and press coverage rarely includes it.
The gap between a device and a process
The team demonstrated transistors and one inverter. A production logic layer needs billions of devices with tightly controlled variation, wafer-scale uniform growth of the injector material, contact resistance that holds at scale, and integration with an interconnect stack. None of those is addressed by the universal charge injector on its own, and each has historically taken years to settle.
Materials that work in a lab can stall in a fab
The universal charge injector must be grown or transferred with the same uniformity across a 300 mm wafer that it shows in a test structure. Two-dimensional materials have a long record of excellent single-device results that did not survive that transition — not because the physics failed, but because the process window was too narrow to hold in volume.
Reliability data is not yet on the table
Nothing published so far addresses how a universal charge injector behaves after thermal cycling, extended bias stress or the accelerated-ageing tests any commercial part must pass. That is entirely normal at this stage of a result, and it is also the reason a laboratory figure should not be read as a product specification.
A realistic horizon
Treat the universal charge injector as a strong early-stage result in a field where early-stage results usually take a decade to reach manufacturing, if they reach it at all. The right posture for anyone planning digital transformation budgets or compute procurement is to watch it, not to plan around it.
Frequently Asked Questions About the Universal Charge Injector
Does this make AI chips faster today?
No. It is a laboratory demonstration of transistors and one inverter, not a manufacturable process. The relevance to AI hardware is about density and power in a future generation of stacked logic, not about the accelerators shipping now.
Why is tin diselenide the material that works?
Because of a combination rather than a single property: an electron affinity near 5.1 eV, degenerate doping above 10^19 per cubic centimetre, and the ability to make a van der Waals contact without deposition damage. Each alone is known; together they let one universal charge injector serve both polarities.
Is the subthreshold swing below the 60 mV/decade limit?
No. The reported figure is below 70 mV per decade, which is above the room-temperature Boltzmann floor of about 60. It is a steep, high-quality switch rather than a sub-thermionic one, and the paper does not claim otherwise.
What does “universal” mean in this context?
That one universal charge injector serves both n-type and p-type channels in a complementary circuit. It does not mean it works with every 2D semiconductor, and the demonstrations are specific: tungsten diselenide for p-type and molybdenum disulfide for n-type.
How long until this could appear in production?
There is no basis for a date. The remaining work — wafer-scale growth, variability control, reliability qualification and interconnect integration — is measured in years, and many results at this stage never clear it. Samsung’s involvement raises the odds of it being pursued; it does not shorten the physics.
References
A Universal van der Waals Tunneling Injector for Monolayer CMOS
PubMed record for the Advanced Materials paper
One material, two transistor types: Universal charge injector points toward densely stacked AI chips
Single material enables charge injection into both n- and p-type 2D transistors
KAIST: universal van der Waals tunneling injector announcement